Sunday 30 November 2014

Universal Gates




                  There is very less we have to recall about the universal gates as they are the most used and most asked ones in Boolean equations, yet we are here to draw out the required Relay Logic that fulfills each and every situation that can be created using two different inputs generated by a switch or by an sensor.
Let us start with NAND followed by NOR and at last we will check out one of unusual situations that can be created.

NAND Gate :-
                In general NAND gate can be termed as an inverted AND gate as for an AND gate the output turns ON when all the inputs provided to this gate are high. But for NAND it is OFF/low (0) when all the inputs are high and for all other conditions the output is ON/high (1).


Let us check out the truth table and using it we will derive an Boolean equation.

Checking out the truth-table we see that there are three conditions at which the output of such an gate is high

1.    When A = 0 and B = 0; i.e. When A=0(released) and B = 0(released)
2.    When A = 0 and B = 1; i.e. When A=0(released) and B = 1(pressed)
3.    When A = 1 and B = 0; i.e. When A=1(released) and B = 0(released)

All the three conditions will turn the output ON but for each instance only one condition can be there, i.e. either 1 or 2 or 3.
So here we can draw out an complete Boolean equation for our output checking out condition 1 when we have A=0 ‘and’ B=0 the word ‘and’ signifies here the use of AND function between them
i.e.       
switch or input that has an status zero will be denoted by negated switch that is A(bar)

Similarly we have for condition 2 and 3
But these all condition will never be there together i.e. only one condition can persist at a time either 1 or 2 or 3. The word 'or' has a specific significance here and tells about the function of OR gate b/w them; i.e. either of the three condition should be satisfied to turn ON the output.
Now combining all the three equations we get
Once we have received such an equation for an output this is very easy to design a relay logic for the same only we need to recall the logic we have established regarding switch status(pressed or released), input(0 or 1), and  switch type(NO or NC), 


It notifies that for a low input we use a negated input and it is replaced by a NC(Normally connected) switch when implemented in RLD.
Similarly for a high input we use a normal input and it is replaced by a NO(Normally open) switch when implemented in RLD.

Hence forth we get this relay logic using the Boolean equation.

In the same way we can pull out a relay logic diagram for NOR Gate

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